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[Other resource] uart-verilog-vhdl

Description: 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
Platform: | Size: 295414 | Author: 刘索山 | Hits:

[Other resource] uart_core_vhdlORverilog

Description: 串uart的vhdl，verilog，lattic实现原码 里面有四个文件,分别UART 源码 (lattice version)\\uart 源码 (Verilog)\\uart 源码 (VHDL)\\uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) \\ uart source (Verilog) \\ uart source (VHDL) \\ uart16550.tar
Platform: | Size: 295101 | Author: efly | Hits:

[Other resource] uart

Description: 实现简单的UART功能,在QUARTUS4.0下编译通过,采用VERILOG HDL编写.
Platform: | Size: 886 | Author: 不是 | Hits:

[Other resource] UART

Description: UART 串口程序，verilog语句，很好的实现了UART的通信功能！
Platform: | Size: 182822 | Author: 王和国 | Hits:

[Other resource] uart

Description: 用Verilog实现的串口异步通信，适用于RS232
Platform: | Size: 1126543 | Author: 王权 | Hits:

[Other resource] UART

Description: 一个通用串口的verilog源程序，包含发送和接收模块
Platform: | Size: 53799 | Author: typhooncome | Hits:

[Other resource] uart

Description: 一个用verilog实现的fpga上的uart接口模块，包括测试模块和实体，并实现了输出接口和状态接口。
Platform: | Size: 14697 | Author: 顾向南 | Hits:

[Com Port] uart

Description: this a Uart source code using Verilog.
Platform: | Size: 10294 | Author: Daniel Zhang | Hits:

[Other resource] UART

Description: verilog设计的UART事例，适合于初学者
Platform: | Size: 155175 | Author: 张扬 | Hits:

[Other resource] UART

Description: 用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。
Platform: | Size: 1429 | Author: saibei007 | Hits:

[Com Port] uart

Description: 采用CPLD实现串口通信（Verilog硬件描述语言）
Platform: | Size: 5106 | Author: wuzhidong | Hits:

[Com Port] uart

Description: Uart port 是一段不错的，完全可综合的verilog源码
Platform: | Size: 752946 | Author: fengcr | Hits:

[Com Port] uart(Verilog)

Description: RS232的verilog源代码,如果需要的可以
Platform: | Size: 10421 | Author: 陈强 | Hits:

[Other resource] uart(Verilog)

Description: uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件
Platform: | Size: 11000 | Author: 阿军 | Hits:

[Com Port] uart

Description: UART接口的VERILOG代码，经过调试成功！
Platform: | Size: 6100 | Author: 刘思平 | Hits:

[Other] u-uart

Description: UART verilog TX/RX OpenCores share
Platform: | Size: 5599 | Author: richman | Hits:

[VHDL-FPGA-Verilog] 串口verilog源代码

Description: 串口UARTverilog源代码。包括控制模块、收、发模块。程序全，功能简洁，包含Q2工程
Platform: | Size: 64207 | Author: huangjiajun1213 | Hits:

[SourceCode] uart

Description: verilog写的与电脑通信的uart，我实验过了，一切都很好，工作很好
Platform: | Size: 12246 | Author: hyh110120119@163.com | Hits:

[SourceCode] xilinx verilog uart

Description:
Platform: | Size: 2655 | Author: 111222333@126.com | Hits:

[Com Port] uartok

Description: 采用verilog编写的串口通信程序，采用了状态机设计！程序简单，消耗资源少-Serial communication written by verilog hdl. It is designed with FSM. The program is simple,and consume resource is few.
Platform: | Size: 431104 | Author: 陈旭 | Hits:
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